Altera Stratix V Avalon-MM Interface for PCIe Solutions Uživatelský manuál Strana 71

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Byte Address Hard IP Configuration Space Register Corresponding Section in PCIe Specification
0x170:0x17C Reserved N/A
0x180:0x1FC Virtual channel arbitration table (Reserved) VC Arbitration Table
0x200:0x23C Port VC0 arbitration table (Reserved) Port Arbitration Table
0x240:0x27C Port VC1 arbitration table (Reserved) Port Arbitration Table
0x280:0x2BC Port VC2 arbitration table (Reserved) Port Arbitration Table
0x2C0:0x2FC Port VC3 arbitration table (Reserved) Port Arbitration Table
0x300:0x33C Port VC4 arbitration table (Reserved) Port Arbitration Table
0x340:0x37C Port VC5 arbitration table (Reserved) Port Arbitration Table
0x380:0x3BC Port VC6 arbitration table (Reserved) Port Arbitration Table
0x3C0:0x3FC Port VC7 arbitration table (Reserved) Port Arbitration Table
0x400:0x7FC Reserved PCIe spec corresponding section name
0x800:0x834 Advanced Error Reporting AER (optional) Advanced Error Reporting Capability
0x838:0xFFF Reserved N/A
0x000 Device ID, Vendor ID Type 0 Configuration Space Header
Type 1 Configuration Space Header
0x004 Status, Command Type 0 Configuration Space Header
Type 1 Configuration Space Header
0x008 Class Code, Revision ID Type 0 Configuration Space Header
Type 1 Configuration Space Header
0x00C BIST, Header Type, Primary Latency Timer,
Cache Line Size
Type 0 Configuration Space Header
Type 1 Configuration Space Header
0x010 Base Address 0 Base Address Registers
0x014 Base Address 1 Base Address Registers
5-2
Correspondence between Configuration Space Registers and the PCIe Specification
UG-01097_avmm
2014.12.15
Altera Corporation
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