Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Uživatelský manuál stáhnout pdf (Strana 669)

100

101

VHDL Tutorials

Verifying a Master DUT

Mentor VIP AE AXI3/4 User Guide, V10.2b

649

September 2013

handle_write

The handle_write process works in a similar way to that previously described for handle_read.

The main difference is that the write transaction handling gets the write data and stores it in the

slave test program Internal Memory depending on the slave_mode setting, and adhering to the

state of the WSTRB write strobes signals. There is an additional pop_transaction_id() into a

queue so that the handle_response process can send write response phase for the transaction, as

shown in Example 11-39 below.

Example 11-39. handle_write

-- handle_write : write data phase through path 1

-- This method receive write data burst or phases for write transaction

-- depending upon slave working mode and write data to memory.

process

variable write_trans: integer;

variable byte_length : integer;

variable burst_length : integer;

variable addr : std_logic_vector(AXI4_MAX_BIT_SIZE-1 downto 0);

variable data : std_logic_vector(7 downto 0);

variable last : integer := 0;

variable loop_i : integer := 0;

begin

loop

pop_transaction_id(write_trans, AXI4_QUEUE_ID_0, index,

AXI4_PATH_1, axi4_tr_if_1(index));

if (slave_mode = AXI4_TRANSACTION_SLAVE) then

get_write_data_burst(write_trans, index, AXI4_PATH_1,

axi4_tr_if_1(index));

get_burst_length(burst_length, write_trans, index, AXI4_PATH_1,

axi4_tr_if_1(index));

for i in 0 to burst_length loop

get_write_addr_data(write_trans, i, 0, byte_length, addr,

data, index, AXI4_PATH_1, axi4_tr_if_1(index));

do_byte_write(addr, data);

if byte_length > 1 then

for j in 1 to byte_length-1 loop

get_write_addr_data(write_trans, i, j, byte_length,

addr, data, index, AXI4_PATH_1, axi4_tr_if_1(index));

do_byte_write(addr, data);

end loop;

end if;

end loop;

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