Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Uživatelský manuál stáhnout pdf (Strana 654)

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Mentor VIP AE AXI3/4 User Guide, V10.2b

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VHDL Tutorials

Verifying a Master DUT

September 2013

while(last = 0) loop

get_write_data_phase(write_trans, loop_i, last, index,

AXI_PATH_1, axi_tr_if_1(index));

get_write_addr_data(write_trans, loop_i, 0, byte_length, addr, data,

index, AXI_PATH_1, axi_tr_if_1(index));

do_byte_write(addr, data);

if byte_length > 1 then

for j in 1 to byte_length-1 loop

get_write_addr_data(write_trans, loop_i, j, byte_length,

addr, data, index, AXI_PATH_1, axi_tr_if_1(index));

do_byte_write(addr, data);

end loop;

end if;

loop_i := loop_i + 1;

end loop;

end if;

push_transaction_id(write_trans, AXI_QUEUE_ID_2, index, AXI_PATH_1,

axi_tr_if_1(index));

end loop;

wait;

end process;

The handle_response code extract demonstrates how to respond to a master write transaction

using a different path_id = AXI_PATH_2 than the path_id used for the address and data phases

of the same transaction. This gives the ability for the slave to execute a write transaction

response in a different order than the order received for a particular write_trans index number.

A write_trans variable is defined to hold this transaction index number before entering a loop to

pop a write transaction from AXI_QUEUE_ID_2 via the pop_transaction_id procedure call.

The delay for the BVALID signal is then set via the set_wr_resp_valid_delay procedure. The

response phase is then executed by the execute_write_response_phase procedure call (refer to

Example 11-27).

Example 11-27. handle_response

-- handle_response : write response phase through path 2

-- This method sends the write response phase

process

variable write_trans: integer;

begin

loop

pop_transaction_id(write_trans, AXI_QUEUE_ID_2, index, AXI_PATH_2,

axi_tr_if_2(index));

set_wr_resp_valid_delay(write_trans, AXI_PATH_2,

axi_tr_if_2(index));

execute_write_response_phase(write_trans, index, AXI_PATH_2,

axi_tr_if_2(index));

end loop;

wait;

end process;

The processing of read transactions works in a similar way as that described above for write

transactions. There are two processes process_read and handle read.

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