
Mentor Verification IP AE AXI4-Lite User Guide, V10.3
151
April 2014
Chapter 8
VHDL Master BFM
This chapter provides information about the VHDL master BFM. The BFM has an API that
contains procedures to configure the BFM and to access the dynamic “Transaction Record” on
page 28 during the life of the transaction.
Overloaded Procedure Common Arguments
The BFMs use VHDL procedure overloading, which results in the prototype having a number
of prototype definitions for each procedure. Their arguments are unique to each procedure and
concern the protocol or operational transaction fields for a transaction. These procedures have
several common arguments, which can be optional, and include the arguments described below:
• transaction_id is an index number that identifies a specific transaction. Each new
transaction automatically increments the index number until reaching 255, the
maximum value, and then the index number automatically wraps to zero. The
transaction_id uniquely identifies each transaction when there are a number of
concurrently active transactions.
• queue_id is a unique identifier for each queue in a test bench. A queue is used to pass the
record of a transaction between the address, data and response channels of a write
transaction, and the address and data channels of a read transaction. There is a maximum
of eight queues available within an AXI4 BFM-Lite. Refer to “Advanced Slave API
Definition” on page 344 for more details on the application of the queue_id.
• bfm_id is a unique identification number for each master, slave, and monitor BFM in a
multiple BFM test bench.
• path_id is a unique identifier for each parallel process in a multiple process test bench.
You must specify the path_id for test bench stimulus to replicate the pipelining features
of a protocol in a VHDL test bench. If no pipelining is performed in the test bench
stimulus (a single process), then specifying the path_id argument for the procedure is
optional. There is a maximum of eight paths available within an AXI4 BFM-Lite. Refer
to “Advanced Slave API Definition” on page 344 for more details on the application of
the path_id.
• tr_if is a signal definition that passes the content of a transaction between the VHDL and
SystemVerilog environments.
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