Altera 100G Development Kit, Stratix IV GT Edition Uživatelský manuál stáhnout pdf (Strana 70)

2–62 Chapter 2: Board Components

Components and Interfaces

100G Development Kit, Stratix IV GT Edition Reference Manual September 2010 Altera Corporation

U50.R9 Address bus

QDR2D_A0

U44.AT23 —

U50.R8 Address bus

QDR2D_A1

U44.AV24 —

U50.B4 Address bus

QDR2D_A2

U44.BA26 —

U50.B8 Address bus

QDR2D_A3

U44.AW25 —

U50.C5 Address bus

QDR2D_A4

U44.BC29 —

U50.C7 Address bus

QDR2D_A5

U44.BA30 —

U50.N5 Address bus

QDR2D_A6

U44.BA23 —

U50.N6 Address bus

QDR2D_A7

U44.AY23 —

U50.N7 Address bus

QDR2D_A8

U44.BA24 —

U50.P4 Address bus

QDR2D_A9

U44.BC23 —

U50.P5 Address bus

QDR2D_A10

U44.BB23 —

U50.P7 Address bus

QDR2D_A11

U44.AW23 —

U50.P8 Address bus

QDR2D_A12

U44.AV31 —

U50.R3 Address bus

QDR2D_A13

U44.AV23 —

U50.R4 Address bus

QDR2D_A14

U44.BD23 —

U50.R5 Address bus

QDR2D_A15

U44.BD24 —

U50.R7 Address bus

QDR2D_A16

U44.BB30 —

U50.A9 Address bus

QDR2D_A17

U44.AV25 —

U50.A3 Address bus

QDR2D_A18

U44.BB25 —

U50.A10 Address bus

QDR2D_A19

U44.BA34 —

U50.C6 Address bus

QDR2D_A20

U44.AW24 —

U50.B7 Byte write select

QDR2D_BWSN0

U44.AK30 —

U50.A5 Byte write select

QDR2D_BWSN1

U44.AL28 —

U50.A1 QDR II echo clock

QDR2D_CQ_N

U44.BC32 —

U50.A11 QDR II echo clock

QDR2D_CQ_P

U44.AY34 —

U50.P10 Write data bus

QDR2D_D0

U44.AL32 —

U50.N11 Write data bus

QDR2D_D1

U44.AL29 —

U50.M11 Write data bus

QDR2D_D2

U44.AM31 —

U50.K10 Write data bus

QDR2D_D3

U44.AM30 —

U50.J11 Write data bus

QDR2D_D4

U44.AM29 —

U50.G11 Write data bus

QDR2D_D5

U44.AN29 —

U50.E10 Write data bus

QDR2D_D6

U44.AR30 —

U50.D11 Write data bus

QDR2D_D7

U44.AR32 —

U50.C11 Write data bus

QDR2D_D8

U44.AR31 —

U50.B3 Write data bus

QDR2D_D9

U44.AU31 —

U50.C3 Write data bus

QDR2D_D10

U44.AT30 —

U50.D2 Write data bus

QDR2D_D11

U44.AV32 —

U50.F3 Write data bus

QDR2D_D12

U44.AV33 —

Table 2–39. QDR II Interface Pin Assignments, Schematic Signal Names, and Functions (Part 7 of 8)

Board

Reference

Description

Schematic

Signal Name

Stratix IV GT

Device

Pin Name

Other

Connections

1 2 ... 65 66 67 68 69 70 71 72 73 74 75 ... 79 80

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