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7–2 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
Functional Overview
This section discusses:
PCI-Avalon bridge module blocks
PCI operational modes
Performance profiles
OpenCore Plus time-out behavior
PCI-Avalon Bridge Blocks
The PCI-Avalon bridge’s blocks provide a feature-rich foundation that
enables the bridge to manage the connectivity for all three PCI
operational modes:
PCI Target-Only Peripheral
PCI Master/Target Peripheral
PCI Host-Bridge Device
Depending on the operational mode, the PCI-Avalon bridge uses some or
all of the predefined Avalon-MM ports. Figure 7–1 shows a generic
PCI-Avalon bridge block diagram, which includes the following blocks:
Four predefined Avalon-MM ports
Control/status registers
PCI master controller (when applicable)
PCI target controller
PCI bus arbiter (for Master/Target and Host bridge mode)
Instantiated Altera PCI MegaCore function
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