
2–32 Chapter 2: Board Components
Components and Interfaces
Cyclone V SoC Development Board November 2013 Altera Corporation
Reference Manual
19
HSMA_TX_N3
H3 1.5-V PCML Transmit channel
20
HSMA_RX_N3
J1 1.5-V PCML Receive channel
33
HSMA_SDA
AH2 2.5-V CMOS Management serial clock
34
HSMA_SCL
AA12 2.5-V CMOS Management serial data
35
JTAG_MUX_TCK
— 2.5-V CMOS JTAG clock signal
36
JTAG_HSMA_TMS
— 2.5-V CMOS JTAG mode select signal
37
JTAG_HSMA_TDO
— 2.5-V CMOS JTAG data output
38
JTAG_HSMA_TDI
— 2.5-V CMOS JTAG data input
39
HSMA_CLK_OUT0
A10 2.5-V CMOS Dedicated CMOS clock out
40
HSMA_CLK_IN0
K14 2.5-V CMOS Dedicated CMOS clock in
41
HSMA_D0
AF9 2.5-V CMOS Dedicated CMOS I/O bit 0
42
HSMA_D1
AF8 2.5-V CMOS Dedicated CMOS I/O bit 1
43
HSMA_D2
AG7 2.5-V CMOS Dedicated CMOS I/O bit 2
44
HSMA_D3
AG1 2.5-V CMOS Dedicated CMOS I/O bit 3
47
HSMA_TX_D_P0
E8 LVDS or 2.5-V LVDS TX bit 0 or CMOS bit 4
48
HSMA_RX_D_P0
H14 LVDS or 2.5-V LVDS RX bit 0 or CMOS bit 5
49
HSMA_TX_D_N0
D7 LVDS or 2.5-V LVDS TX bit 0n or CMOS bit 6
50
HSMA_RX_D_N0
G13 LVDS or 2.5-V LVDS RX bit 0n or CMOS bit 7
53
HSMA_TX_D_P1
D6 LVDS or 2.5-V LVDS TX bit 1 or CMOS bit 8
54
HSMA_RX_D_P1
K12 LVDS or 2.5-V LVDS RX bit 1 or CMOS bit 9
55
HSMA_TX_D_N1
C5 LVDS or 2.5-V LVDS TX bit 1n or CMOS bit 10
56
HSMA_RX_D_N1
J12 LVDS or 2.5-V LVDS RX bit 1n or CMOS bit 11
59
HSMA_TX_D_P2
E4 LVDS or 2.5-V LVDS TX bit 2 or CMOS bit 12
60
HSMA_RX_D_P2
J10 LVDS or 2.5-V LVDS RX bit 2 or CMOS bit 13
61
HSMA_TX_D_N2
D4 LVDS or 2.5-V LVDS TX bit 2n or CMOS bit 14
62
HSMA_RX_D_N2
J9 LVDS or 2.5-V LVDS RX bit 2n or CMOS bit 15
65
HSMA_TX_D_P3
E3 LVDS or 2.5-V LVDS TX bit 3 or CMOS bit 16
66
HSMA_RX_D_P3
K7 LVDS or 2.5-V LVDS RX bit 3 or CMOS bit 17
67
HSMA_TX_D_N3
E2 LVDS or 2.5-V LVDS TX bit 3n or CMOS bit 18
68
HSMA_RX_D_N3
K8 LVDS or 2.5-V LVDS RX bit 3n or CMOS bit 19
71
HSMA_TX_D_P4
E1 LVDS or 2.5-V LVDS TX bit 4 or CMOS bit 20
72
HSMA_RX_D_P4
G12 LVDS or 2.5-V LVDS RX bit 4 or CMOS bit 21
73
HSMA_TX_D_N4
D1 LVDS or 2.5-V LVDS TX bit 4n or CMOS bit 22
74
HSMA_RX_D_N4
G11 LVDS or 2.5-V LVDS RX bit 4n or CMOS bit 23
77
HSMA_TX_D_P5
D2 LVDS or 2.5-V LVDS TX bit 5 or CMOS bit 24
78
HSMA_RX_D_P5
J7 LVDS or 2.5-V LVDS RX bit 5 or CMOS bit 25
79
HSMA_TX_D_N5
C2 LVDS or 2.5-V LVDS TX bit 5n or CMOS bit 26
80
HSMA_RX_D_N5
H7 LVDS or 2.5-V LVDS RX bit 5n or CMOS bit 27
83
HSMA_TX_D_P6
B2 LVDS or 2.5-V LVDS TX bit 6 or CMOS bit 28
Table 2–23. HSMC Interface Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4)
Board
Reference (J12)
Schematic Signal
Name
Cyclone V SoC
Pin Number
I/O Standard Description
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