Altera Ethernet Blaster Communications Cable manuály

Uživatelské manuály a uživatelské příručky pro Sítě Altera Ethernet Blaster Communications Cable.
Poskytujeme 5 manuály pdf Altera Ethernet Blaster Communications Cable ke stažení zdarma podle typů dokumentů: Specifikace, Uživatelská příručka

Altera Ethernet Blaster Communications Cable Specifikace (59 strany)

Značka: Altera | Kategorie: Sítě | Velikost: 1.01 MB |

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II Installation &

1

Licensing for Linux

1

Workstations

1

Linux Workstations

2

Contents

4

TABLE OF CONTENTS

5

Documentation Conventions

7

Terminology

8

Installing the

9

Introduction

10

Quartus II Software System

10

Requirements

10

Versions of Altera Software

12

Software

13

Altera.com Download Center

13

Installing Downloaded Altera

13

Altera Complete Design Suite

15

ALTERA COMPLETE DESIGN SUITE

16

Installation Script

17

Design Suite

17

Quartus II Software

18

Licensing the

19

Obtaining a License File

21

OBTAINING A LICENSE FILE

22

Modifying the License File

23

ODIFYING THE LICENSE FILE

24

Manager Server

25

Another License Server

28

Verifying Required Libraries

29

Specifying the License File

31

SPECIFYING THE LICENSE FILE

33

.cshrc File

34

Specifying a Web Browser

36

Licensing Related Software

39

LICENSING RELATED SOFTWARE

40

More Configuration

41

Information

41

Setting Environment Variables

42

Variables

43

Documentation and

47

Technical Support

47

Tutorial

48

Using Quartus II Help

48

Contacting Altera

49

Product Information

50

Appendix

51

Software File Organization

52

Mounting and Unmounting

55

DVD-ROMs

55

Altera Ethernet Blaster Communications Cable Specifikace (267 strany)

Značka: Altera | Kategorie: Sítě | Velikost: 1.96 MB |

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Contents

2

Related Information

10

LAB Control Signals

13

ALM Resources

14

ALM Output

15

ALM Operating Modes

16

Normal Mode

17

Extended LUT Mode

17

Arithmetic Mode

17

Shared Arithmetic Mode

18

Types of Embedded Memory

21

Total RAM Bit (Kb)

22

MLABM10K

22

Embedded Memory Features

27

MLABM10KFeatures

28

Embedded Memory Modes

30

Single Clock Mode

32

Read/Write Clock Mode

32

Input/Output Clock Mode

32

Independent Clock Mode

32

Parity Bit in Memory Blocks

33

Data Byte Output

34

RAM Blocks Operations

34

Features

38

Resources

40

Design Considerations

41

Block Architecture

42

Input Register Bank

43

Pre-Adder

45

Internal Coefficient

45

Multipliers

45

Systolic Registers

47

Double Accumulation Register

47

Output Register Bank

47

Independent Multiplier Mode

48

18 x 19 Complex Multiplier

51

Multiplier Adder Sum Mode

52

Systolic FIR Mode

53

27-Bit Systolic FIR Mode

54

Initial release.1.0May 2011

56

Clock Networks

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Source of Clock Resource

58

Number of Resources

58

Available

58

DeviceClock Resource

58

Global Clock Networks

59

Regional Clock Networks

60

Clock Sources Per Quadrant

61

Types of Clock Regions

62

Clock Network Sources

63

PLL Clock Outputs

64

Clock Output Connections

65

Clock Control Block

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GCLK Control Block

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RCLK Control Block

66

PCLK Control Block

67

Clock Power Down

68

Clock Enable Signals

68

Cyclone V PLLs

70

PLL Strip

72

Fractional PLL Architecture

74

Fractional PLL Usage

75

PLL Control Signals

76

Clock Feedback Modes

77

Source Synchronous Mode

78

Direct Compensation Mode

79

Zero-Delay Buffer Mode

80

External Feedback Mode

81

Automatic Switchover

84

Manual Clock Switchover

87

Guidelines

88

Standard SupportI/O Standard

95

Altera Corporation

100

Send Feedback

100

PLLs and Clocking

102

Guideline: Use the Same V

107

Voltage in the Same Bank

108

HPS Core

110

A4A2Member Code

111

A9A7A5Member Code

112

C5C4C3Member Code

112

C9C7Member Code

113

D7D5Member Code

113

D9Member Code

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F1152F896F672F484U484Package

114

A6A5A4A2Member Code

114

C6C5C4C2Member Code

115

D6D5Member Code

116

F896F896Package

116

Output PathInput Path

117

Programmable Current Strength

119

Programmable IOE Delay

120

Programmable Pre-Emphasis

121

Open-Drain Output

122

Bus-Hold Circuitry

123

Pull-up Resistor

123

Uncalibrated OCT (Output)

124

I/O Standard

124

CV-52005

125

2013.06.21

125

Calibrated OCT (Output)

126

Calibrated OCT (Input)

128

RZQ (Ω)R

128

LVDS Input R

130

OCT in Cyclone V Devices

130

Calibration block

131

Single-ended I/O Termination

134

Differential I/O Termination

136

LVPECL Termination

140

GT D5, D7, and D9 Devices

142

LVDS SERDES Circuitry

143

RXTXSidePackageMember Code

145

Transmitter Blocks

152

Transmitter Clocking

153

Deserializer

156

LVDS Receiver Mode

156

Differential Data Orientation

158

Differential I/O Bit Position

159

Internal 8-Bit Parallel Data

160

Receiver Channel Data Number

160

LSB PositionMSB Position

160

Document Revision History

162

ChangesVersionDate

163

External Memory Performance

167

Guideline: Using DQ/DQS Pins

168

DQ/DQS Groups in Cyclone V E

169

DQ/DQS Groups in Cyclone V GX

171

DQ/DQS Groups in Cyclone V GT

174

DQ/DQS Groups in Cyclone V SX

176

DQ/DQS Groups in Cyclone V ST

176

UniPHY IP

177

DQS Phase-Shift Circuitry

178

DQS Logic

180

D9) Devices

181

Delay-Locked Loop

182

DLL Phase-Shift

184

PHY Clock (PHYCLK) Networks

185

DQS Logic Block

187

Update Enable Circuitry

188

DQS Delay Chain

188

DQS Postamble Circuitry

188

Dynamic OCT Control

189

IOE Registers

190

Output Registers

191

Delay Chains

192

Hard Memory Controller

194

DescriptionFeature

195

Multi-Port Front End

196

Bonding Support

197

Member Code

199

Package A9A7A5A4A2

199

MSEL Pin Settings

205

Configuration Sequence

206

Power Up

207

Configuration

208

Configuration Error Handling

208

Device Configuration Pins

209

Configuration Pin

210

Using One Configuration Data

214

Active Serial Configuration

214

Using EPCS and EPCQ Devices

218

Passive Serial Configuration

222

JTAG Configuration

226

CONFIG_IO JTAG Instruction

229

Remote System Upgrades

231

Configuration Images

232

DescriptionRegister

234

Control Register

235

Status Register

235

Design Security

236

ALTCHIP_ID Megafunction

237

JTAG Secure Mode

237

Security Key Types

238

Security Modes

238

Error Detection Features

241

Configuration Error Detection

241

User Mode Error Detection

241

Specifications

242

Error Detection Frequency =

243

Internal Oscillator Frequency

243

Enabling Error Detection

244

CRC_ERROR Pin

245

Error Detection Registers

245

Double Word

246

Location

246

Error Detection Process

247

BST Operation Control

250

Supported JTAG Instruction

252

JTAG Private Instruction

255

Performing BST

256

Power Consumption

261

Hot-Socketing Feature

262

Hot-Socketing Implementation

262

Power-Up Sequence

263

Current Transient (mA)

264

Power Rail

264

Altera Ethernet Blaster Communications Cable Uživatelská příručka (32 strany)

Značka: Altera | Kategorie: Sítě | Velikost: 1.54 MB |

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User Guide

1

P25-36448-00

2

Contents

3

Communications Cable

5

EthernetBlaster II

6

00:07:ED:05:XX:XX

6

Host Name: acebXXXX

6

EthernetBlaster

9

Support DHCP

10

Cable Setup

11

Optional Programming Files

17

Cable Administration

19

Managing Passwords

20

JTAG Clock Settings

21

ETHERNET

23

Upgrading the Firmware

24

Cable Specifications

25

0.250 Typ

26

0.700 Typ

26

0.425 Typ

26

0.100 Sq

26

0.025 Sq

26

CC(TARGET)

27

Operating Conditions

28

Additional Information

31

Info–2 Additional Information

32

Typographic Conventions

32

Altera Ethernet Blaster Communications Cable Uživatelská příručka (35 strany)

Značka: Altera | Kategorie: Sítě | Velikost: 1.16 MB |

Angličtina

Tabulka s obsahem

User Guide

1

UG-120904-1.1

2

P25-10326-01

2

Contents

3

List of Figures

5

List of Tables

7

1. About the EthernetBlaster

9

Communications Cable

9

Software Requirements

10

Connections

10

Introduction

11

Cable Setup

12

EthernetBlaster

13

Cable Administration

23

Managing Passwords

24

ETHERNET

25

Firmware Upgrade

26

Cable Specifications

29

0.250 Typ

30

0.700 Typ

30

0.425 Typ

30

0.100 Sq

30

0.025 Sq

30

Operating Conditions

31

Info. Additional Information

33

Revision History

34

How to Contact Altera

34

Typographic Conventions

34

SUBDESIGN), as

35

TRI) are shown in Courier

35

Altera Ethernet Blaster Communications Cable Specifikace (109 strany)

Značka: Altera | Kategorie: Sítě | Velikost: 1.41 MB |

Angličtina

Tabulka s obsahem

Altera Software

1

Installation and Licensing

1

Contents

4

TABLE OF CONTENTS

5

Documentation Conventions

9

Terminology

10

Installing Altera

11

Software

11

Introduction

12

System Requirements

13

Supported Operating Systems

14

UPPORTED OPERATING SYSTEMS

15

Altera.com Download Center

17

Installing Downloaded Altera

18

Installation Prerequisites

19

Installation Instructions

20

Complete Design Suite

24

Microsoft website

26

Quartus II Software for Linux

27

Configuring the Linux User

28

Environment

28

Programming Cable Drivers

31

Licensing Altera

32

Licensing Options

33

ICENSING OPTIONS

34

Non-Licensed Software

35

LICENSING OPTIONS

36

Obtaining a License File

37

Licensing Requirements

38

Hard-Disk Serial Number

39

License Server Host ID Number

40

Software Guard ID

40

Requesting a License File

41

Self Service Licensing Center

42

Creating a Computer

44

Rehosting a License

45

Obtaining a Companion License

46

Adding Floating Seats

47

Splitting a Floating License

48

Renewing a License

48

Activating a License

49

Managing Licensed Users

49

Setting Up the License File

50

License File Conditions

51

Setting Up a Fixed License

51

SETTING UP THE LICENSE FILE

52

File (.cshrc)

54

Quartus II Software

55

ETTING UP THE LICENSE FILE

59

Development Kits

60

Specify the License for the

61

Manager Server

63

Upgrading the FLEXlm License

64

Manager Server Software

64

Viewing FLEXlm Options

68

Starting the License Server

69

Automatically at Startup

69

(Administrator) privileges

71

More Configuration

73

Information

73

Variables

75

Identifying and Terminating

76

Nonresponding Linux Processes

76

Mounting and Unmounting DVDs

77

MOUNTING AND UNMOUNTING DVDS

78

Documentation and

79

Technical Support

79

Tutorial

80

Using Quartus II Help

80

Quartus II Help

81

Contacting Altera

82

References

83

Document Revision History

84

Appendix

85

Software File Organization

86

License File Troubleshooting

90

ModelSim-Altera Software

91

Specifying Licensed HDL

92

PC for Versions Prior to 5.5e

93

Network License Port

94

Frequently Asked Questions

95

FREQUENTLY ASKED QUESTIONS

96

License File

97

Serial Number

98

Networks and Servers

99

Messages

100

FEATURE and INCREMENT Lines

103

The feature name

104

Example license.dat Files

106

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