Altera LCD Multimedia HSMC Uživatelský manuál stáhnout pdf (Strana 43)

2–35 Altera Corporation

LCD Multimedia HSMC August 2008

Expansion Interface

1 CMOS utilization of the HSMC pins is assumed and no options

for supporting other differential signaling are provided with the

board. The eight clock-data-recovery high-speed transceiver

channels are not connected on this HSMC.

The HSMC connector layout is shown in

Figures 2–18 below.

Figure 2–18. Samtec Header Connector

1 HSMC connector pinout information is shown throughout this

document for each individual interface and in the appendices

for connecting to various FPGA starter and development

boards.

2.413

((90 POS / 30 x .7875) + .050)

.78 REF

.626 REF

.036 REF .006 REF

.245 REF

.150 REF

.285 REF

DP Bank

.571

(29 EQ Spaces @ .0197)

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Altera LCD Multimedia HSMC Uživatelský manuál Strana 43