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2–6 Chapter 2: Board Components
Featured Device: Stratix IV GT Device
Transceiver Signal Integrity Development Kit, November 2011 Altera Corporation
Stratix IV GT Edition Reference Manual
Table 22 lists the features of the Stratix IV GT EP4S100G2F40I1N device.
Table 23 lists the Stratix IV GT component reference and manufacturing
information.
I/O Resources
Figure 2–2 shows the bank organization and I/O count for the EP4S100G2F40I1N
device in the 1517-pin FBGA package.
Table 2–2. Stratix IV GT Device EP4S100G2F40I1N Features
ALMs
Equivalent
LEs
M9K
RAM
Blocks
M144K
Blocks
Total
RAM
bits
DSP
Blocks
18-bit × 18-bit
Multipliers
PLLs
Maximum
User I/O pins
Package
Type
91,200 228,000 1,235 22 17,133 161 1,288 8 636
1517-pin
FBGA
Table 2–3. Stratix IV GT Device Component Reference and Manufacturing Information
Board Reference Description Manufacturer
Manufacturing
Part Number
Manufacturer
Website
U33 Stratix IV GT Altera
Corporation EP4S100G2F40I1N www.altera.com
Figure 2–2. Stratix IV GT Device I/O Bank Diagram
(1)
Note to Figure 2–2:
(1) There are two additional PMA-only transceiver channels in each transceiver bank.
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