Altera Cyclone V GX FPGA Development Board Uživatelský manuál Strana 58
- Strana / 60
- Tabulka s obsahem
- KNIHY
- Reference Manual 1
- Contents 3
- Additional Information 4
- 1. Overview 5
- Board Component Blocks 6
- Chapter 1: Overview 1–3 7
- Handling the Board 8
- 2. Board Components 9
- Board Overview 10
- I/O Resources 13
- FPGA Configuration 18
- Figure 2–3. JTAG Chain 19
- Note to Table 2–6: 21
- Figure 2–4. PFL Configuration 22
- Status Elements 23
- Setup Elements 24
- CPU Reset Push Button 25
- MAX V Reset Push Button 25
- Program Select Push Button 25
- Clock Circuitry 26
- Off-Board Clock Input/Output 27
- General User Input/Output 28
- General LEDs 29
- HSMC LEDs 29
- PCI Express LEDs 30
- Debug Header 31
- Components and Interfaces 32
- 10/100/1000 Ethernet 34
- SDI Video Output/Input 39
- DDR3 SDRAM 41
- Synchronous SRAM 50
- Power Supply 53
- Power Distribution System 54
- Power Measurement 55
- Notes to Table 2–35: 56
- 3. Board Components Reference 57
- Note to Table: 59
- Typographic Conventions 60
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